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soc_rp2040::ctrl

Typed RP2040 peripheral identities and cross-core ownership claims.

struct GpioPort {
pub pin: u8,
}

Implements: Clone, Copy, Debug, Eq, PartialEq, StructuralPartialEq

struct I2cPort {
pub ctrl: I2cCtrl,
pub cfg: hal::bus::I2cConfig,
}

Implements: Clone, Copy, Debug, Eq, PartialEq, StructuralPartialEq

References: I2cConfig, I2cCtrl

struct PioLease { /* private fields */ }

An exclusive PIO block and pin bundle. Claims bits 2/3, beside UART 0/1 and USB 7. No public constructor, Clone or forced release is available.

Implements: Drop

struct SpiPort {
pub ctrl: SpiCtrl,
pub cfg: hal::bus::SpiConfig,
}

Implements: Clone, Copy, Debug, Eq, PartialEq, StructuralPartialEq

References: SpiConfig, SpiCtrl

struct UartPort {
pub ctrl: UartCtrl,
pub cfg: hal::bus::UartConfig,
}

Implements: Clone, Copy, Debug, Eq, PartialEq, StructuralPartialEq

References: UartConfig, UartCtrl

enum I2cCtrl {
I2c0,
I2c1,
}

Implements: Clone, Copy, Debug, Eq, PartialEq, StructuralPartialEq

enum SpiCtrl {
Spi0,
Spi1,
}

Implements: Clone, Copy, Debug, Eq, PartialEq, StructuralPartialEq

enum UartCtrl {
Uart0,
Uart1,
}

Implements: Clone, Copy, Debug, Eq, PartialEq, StructuralPartialEq

fn claim_gpio(pin: u8) -> bool
fn claim_uart(ctrl: UartCtrl) -> bool

References: UartCtrl

fn claim_usb() -> bool

USB uses bit 7 of the peripheral ownership word; UARTs occupy bits 0/1.

fn release_gpio(pin: u8)
fn release_uart(ctrl: UartCtrl)

References: UartCtrl

fn release_usb()
fn try_claim_pio(block: u8, pins: u32) -> Option<PioLease>

Single-attempt acquisition: a busy claim lock is Busy, never an ISR spin.

References: PioLease