esp32_dac

DAC: two 8-bit analog outputs on GPIO 25 and GPIO 26.

Each channel converts a value of 0–255 to a voltage of 0 V–VDD3P3_RTC (the 3.3 V rail). There are exactly two, fixed to two pins; the ESP32 has no other DAC.

These are the same pads as ADC2

DAC1 is GPIO 25 is ADC2 channel 8; DAC2 is GPIO 26 is ADC2 channel 9. One bond pad, two functions — which is what lets a loopback test drive the DAC and read it straight back on ADC2 without a wire. It also means the two cannot both own a pad at once.

The cosine generator is on at reset

SENS_DAC_CW_EN1 and SENS_DAC_CW_EN2 default to 1: out of reset each channel is wired to the cosine-wave generator, not to its output register. Write a value without clearing them and the pin carries a tone that ignores the value entirely — a pin that is doing something, which reads like a working DAC until you look at what. This driver clears them.

The pad has to belong to the RTC domain

Like ADC, the DAC pad is an RTC pad. Left with the digital GPIO peripheral it is driven by two masters at once; MUX_SEL hands it to the analog side and the input buffer and pulls come off, so the DAC is the only thing on the pin. The power itself is taken under software (DAC_XPD_FORCE) rather than left to the ULP’s state machine, which is not running here.

Register facts

DR_REG_RTCIO_BASE = 0x3FF48400, DR_REG_SENS_BASE = 0x3FF48800, from esp-idf soc/soc.h. Fields from soc/rtc_io_reg.h and soc/sens_reg.h, and the sequence from hal/dac_ll.h.

Register	Address	Fields used
RTC_IO_PAD_DAC1	0x3FF48484	DAC [26:19], XPD_DAC 18, MUX_SEL 17, FUN_SEL [16:15], FUN_IE 11, DAC_XPD_FORCE 10, RUE 27, RDE 28
RTC_IO_PAD_DAC2	0x3FF48488	same layout
RTC_GPIO_ENABLE	0x3FF4840C	output-enable bits, from bit 14 by RTC GPIO number
SENS_SAR_DAC_CTRL1	0x3FF48898	SW_TONE_EN 16
SENS_SAR_DAC_CTRL2	0x3FF4889C	DAC_CW_EN1 24, DAC_CW_EN2 25

Structs

Dac

struct Dac { /* private fields */ }

The DAC, taken as a whole. Its two channels share the tone switch and the cosine-generator register, so one owner keeps them consistent.

Enums

Channel

enum Channel {
    Gpio25,
    Gpio26,
}

A DAC channel, named by the GPIO it drives.

Implements: Clone, Copy, Debug, Eq, PartialEq, StructuralPartialEq